/Concepts:
- Dual port RAM : 1 port for
Write, another for read
- It allows user to write/read
from different locations at same time
- This need to be checked using
one test
- If write & read happens at
same time, first perform the read, then perform the write.
Question:
- Declare dual port ram will
below ports
- Clk, rst, addr_wr, addr_rd, wr,
rd, data_wr, data_rd
- Declare a memory using array,
array size based on address port width
- When rst = 1, reset memory
contents
- When wr = 1, write data in to
memory
- When rd = 1, read data from
memory
- TB Coding
- Instantiate memory
- Generate clk, rst(2 clocks)
- Write different cases
- Write all 256 locations, read
back all of them
- Do parallel write/read
- DO rand parallel write/read’s