Synthesis and STA Training is a 4 months course, provides the participants with in depth exposure to both Synthesis and complete Timing SignOff strategies for successful and confident Tape-Out of the Design to the Semiconductor Fabrication House.
STA Training:
Timing is the heart beat of any chip, thorough understanding of timing concepts, development of Timing constraints are given through this STA Training especially when it comes to Ultra Deep Sub-Micron Technologies such as 28nm to 5nm.
There are multiple parameters that decide how the timing of a chip would be functioning like Transition times of Clock phases and Data Path signals, Process and Voltage and Temperature (PVT) variations, Crosstalk noise affecting functionality of the chip, Crosstalk Delay affecting timing of the chip, which will be covered in greater detail in this STA Training. Other topics such as Advanced OCV, requirement of Clock path tweaking to meet desired frequency of the Chip will be discussed extensively in this STA Training. Pessimism inclusion when design is taped-out has been a norm to avoid any Silicon surprises but for higher frequency Designs on lower technology nodes, pessimism beyond a limit could be an over-do in which case pessimism-Removal is done through Path-Based Analysis rather than Graph based Analysis. This topic is covered with fine clarity in this STA Training. Above all, the fundamental part of setup and hold time fixing covering the above points are the key aspects of this STA Training.
Candidates will get access to tool both at institute and has option to connect to servers from home using Secure VPN to work on two Sign Off projects hands on. Fixing of timing violations based on Sign-Off analysis for Multi Mode Multi Corner though ECOs would be across the breadth of this STA Training.
Objective of this STA training is to shape graduating Bachelor’s and Master’s degree students as well as Physical Design Engineers explore opportunities in Block Level as well as Full Chip STA.
Synthesis Training:
Synthesis training includes all the aspects starting from HDL modelling, Synthesis flow, Constraints, analysing and debugging the results, optimization techniques, report generation and hands on projects to understand the Synthesis complete flow.
Below are the STA Training topics.
SignOff STA Training topics :
Synthesis Training covers the aspect of converting the design in form of RTL into Technology mapped netlist. Synthesis is an algorithm intensive task consisting of many stages within it requiring various inputs in order to produce a functionally correct netlist. The main part of Synthesis Training consists of reading in the design, converting RTL to Boolean equations through elaboration, then converting the Boolean equations to Generic Mapped Cells and then technology mapped cells from library, setting constraints, optimizing the design, analyzing the results and saving the design database for Placement and Routing stage to take on. Candidates who are interested in exploring opportunities in Synthesis and Front-end STA can undergo this in-depth Synthesis training to get good understanding of RTL constructs, Gate level Netlist, Constraint Development, Latch based designs, pipe lining and re-timing, basic Scan stitching, Setup timing closure, Topography based logic re-structuring, Wire Load Models, Logical Equivalence Checks. Hierarchical Synthesis is another key feature covered in this Synthesis Training Cadence Implementation Suite for Synthesis (as RTL Compiler / Genus) would be used in this Synthesis Training program. Candidates would get hands on work on two full designs.
Synthesis Training Topic covered.
Course | Synthesis & STA Training |
---|---|
Duration | 18 weeks |
Next Batch | |
Fee | INR 29000 +GST at 18%(E-learning) |
Tool | Design Compiler and Primetime |
Mode of training | Training is offered as eLearning + Live sessions Student gets access to all course recorded videos. Live sessions are done over the weekends which covers theory revision and complete hands on lab sessions. |
Tool Access | 24×7 tool access for complete course duration |
Certificate | Issued |
Batch Size | 20 |
Assignments | 5 |