Syllabus
Course Overview
Schedule
Demo
FAQs
Trainer
Certificate
Syllabus
- Features
- Functional Description
- Pad Definition and Description
- Pin per byte
- LPDDR5/LPDDR5X Bank Architecture
- LPDDR5 Address Translation Table
- Bank architecture transition
- Burst Operation
- LPDDR5 SDRAM Addressing
- Speed Grade
- Burst Sequence
- Power-up, Initialization and Power-off Procedure
- Voltage Ramp and Device Initialization
- Dual VDD2 Rail setting (MR13 OP[7]) and its change
- Reset Initialization with Stable Power
- Power-off Sequence
- Uncontrolled Power-off Sequence
- Training
- ZQ Calibration
- ZQ Reset
- Multi-die Package Considerations
- ZQ External Resistor, Tolerance, and Capacitive Loading
- Flow Chart Examples
- Command Bus Training
- Three physical Mode Register
- Command Bus Training Mode1
- Command Bus Training Mode1 (FSP with DVFSQ enable)
- Command Bus Training Mode2
- Command Bus Training Mode2 (FSP with DVFSQ enable)
- CA VREF Training
- DQ VREF Training
- WCK2CK Leveling
- Write-leveling called in LPDDR4
- Duty Cycle Adjuster (DCA)
- Duty Cycle Adjuster Range
- Relationship between WCK waveform and DCA Code Change
- The relationship between DCA Code Change and DQ output/RDQS timing
- Read DCA (Duty Cycle Adjuster)
- Duty Cycle Monitor (DCM)
- READ DQ Calibration
- WCK-DQ Training
- RDQS toggle mode
- Enhanced RDQS training mode
- Read/Write-based WCK-RDQS_t Training
- Rx Offset Calibration Training
- Mode Register Assignment and Definition in LPDDR5
- Mode Register Assignment and Definition in LPDDR5X
- Mode Register Definition
- Truth Table
- Command Truth Table
- WCK Operation
- WCK2CK Synchronization operation
- Row Operation
- Read/Write Operation
- Refresh Operation
- Other Operation
- Reliability & Power-Optimization
- Dynamic Voltage and Frequency Scaling (DVFS)
- Data Copy Low Power Function
- Write X operation
- Post Package Repair (PPR)
- Refresh Management Command
- Refresh Management Enhancement (ARFM)
- Decision Feedback Equalization (DFE)
- Link ECC
- Single-ended mode for Clock, Write Clock and RDQS
- Enhanced WCK Always On Mode
- Pre-Emphasis for DQ output
- Rank to Rank AC Parameter
- Effective Burst Length (BL/n) Definition
- Command Timing Constraints
- Read to Write Timing (tRTW)
- Auto Precharge Command Timing Constraints
- CAS Command Timing Constraints
- Training Related Timing Constraints
- MRR/MRW Timing Constraints
- Rank to Rank Command Timing Constraints
- Core AC Timing Parameters by Speed Grade
- Core AC Timing Parameters for LPDDR5
- Core AC Timing Parameters for LPDDR5X
Course Overview
Course Overview
- LPDDR5 Overview
- WCK Clocking
- Initialization and Training
- LPDDR5 State Diagram
- Mode Register Definition
- LPDDR5 Operations
- Command Constraint and AC timing
- AC Timing
- Die configuration, Package ballout, Pin Definition
Schedule
Currently there is no live sessions planned. You may enroll for e-learning course for self paced learning, with option to join upcoming batch with no additional cost.
| Course | SoC Design & Verification |
|---|---|
| Duration | 3.5 weeks (weekend course) |
| Next Batch | Adhoc (when course has a minimum strength) |
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| Certificate |
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| Batch Size | 20 |
| Assignments | 20 |
| Trainer | 12+ Years exp in RTL design & Functional verification |
Demo
FAQs
- Course presentations for all topics
- Session notes
- Lab documents with detailed steps
- User guides
- Course does not have any pre-requisites. However any exposure to Digital design, VLSI design flow is an added advantage.
- Each session of course is recorded, missed session videos will be shared
- Yes, You will have option to view the recorded videos of course for the sessions missed
- You will have option to repeat the course any time in next 1 year
- Yes, Course fee also includes support for doubt clarification sessions even after course completion
- You have option to mail you queries
- Option to meet in person to clarify doubts
Trainer
Experienced Trainer
- Multiple trainers, with experience of working on multiple SOC tape outs. All working in top-3 product companies.
Certificate
Play Video
- 1-1 Dedicated Mentor Support
- mock interview
- Industry Standard Projects
- Support with resume update