Course Overview

FPGA System Design training is a 8 months course provides participants with wider and deep understanding of the FPGA Architecture, Design, Timing closure flow and debugging.

FPGA System Design course is for both Design and verification engineers who want to gain expertise and hands on exposure to FPGA design, prototyping and Validation. FPGA training focuses on the subtleties of the Vivado flow and its add-on tools. By mastering the design methodologies presented in FPGA System Design course, participants will be able to close the timing of their designs faster, and also shorten the development time, and lower development costs.

Course combines insightful lectures with practical lab exercises to reinforce key concepts. FPGA training will also help experienced engineers working in other domains, planning to switch in to FPGA domain. Course provides multiple hands on project exposure to provide hands on exposure to the complete FPGA system design flow.

Course has been framed with a seamless interest to plug and play the FPGA boards. Every session is planned with good hands-on examples to enable quicker understanding. Lab sessions are planned at regular intervals. Traditional FPGA developers code in languages such as Verilog HDL and VHDL. These developers are comfortable with creating FPGAs using the software, closing timing on complicated hardware circuits and managing complicated I/O interfaces to the FPGA. Below is the quick review of the course.

• FPGA Architecture
• FPGA internals and I/0
• FPGA timing closure
• FPGA implementation by RTL mode as well as IP Mode
• FPGA debugging
• Software development kit environment
• Booting FPGA in petalinux/ubuntu